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Field Effect Transistor Theory – Part 3

Depletion Mode IGFET symbols

Depletion Mode IGFET symbols

In part 2 I finished up the description of the JFET. Tonight I will describe the operation of an Insulated Gate Field Effect Transistor (IGFET). Most often an IGFET is called a MOSFET because of the materials used in it, Metal Oxide Silicon FET.   For those of you that have followed the LibreCAD tutorials, hatching drawings is one of the hardest parts.   I am tired of fighting all the “undefined area to be hatched” errors and am not going to put as many drawings in this post.   However, in general things work very similar to the JFET and I should be able to handle it in words.

Conceptual diagram of a Depletion Mode IGFET.

Conceptual diagram of a Depletion Mode IGFET.


IGFET’s come in both n-channel and p-channel versions. In addition there are two modes of operation for each type; Depletion Mode and Enhancement Mode. We are going to start with the depletion mode because it is most similar to the JFET. We will also use the n-channel version throughout. The p-channel versions work exactly the same way except the various parts of the FET are doped with the opposite type of material (n doped areas will be p doped areas and vice-versa.)

The second picture shows the construction of the depletion mode MOSFET.  All of the red areas are deposits of aluminum to provide connections to the silicon below, except the gate area.  The aluminum in the gate area is basically one plate of a capacitor.  The area drawn in white is a very thin layer of glass deposited on the silicon material.  This glass insulator does two things for us.  First, it reduces the input current to a very very low value and essentially zero.  (Nothing is absolutely zero.)   The second thing is it can allow the gate to become positive in comparison to the drain voltage without causing a PN junction to become forward biased.  This will be very important later on as we talk about the enhancement mode.   The one downside to this is the glass is very thin and a discharge of static electricity can cause the insulation to break-down and render the MOSFET useless.  That is the reason many electronic boards such has computer boards have static warnings on them.   The final connection on the diagram is the substrate connection.  Normally this is not brought outside the device and is connected to the source lead.   It is shown because it is important for the designers of integrated circuits with many of these devices all built on one piece of silicon.

Initially, we will assume we have the circuit connected as we did in Part 1 of this FET series.  We have a very small positive voltage connected to the drain with the negative lead connected to the source.  We have a negative voltage on the gate compared to the source (Vgs).   This negative voltage will repel the free electrons in the channel and narrow the channel.   Just like it did on the JFET, the narrowing of the channel will increase the resistance from the source to the drain.   Meanwhile, a depletion zone will form on the PN junction between the channel and the substrate and this will also narrow the channel.  (Depletion zones are talked about in my post about a diode.)

Now we will assume we start increasing the voltage between the drain and source.   Just like happened on the JFET a depletion zone will form on the drain end of the channel and substrate.  This will squeeze the channel at the drain end and eventually pinch it completely.   If we increase the negative voltage on the gate the channel will be decreased.   This whole operation is very similar to the JFET and the idealized curves look very similar.

Enhancement mode IGFET symbols

Enhancement mode IGFET symbols

We have rode the “very similar” train long enough, now it is time to switch tracks and start complicating things.  First, I will show the symbols for the enhancement mode IGFETS.  There is a small difference in the symbol with the breaks in the line between the source and drain.   Another thing I need to point out on both the depletion and enhancement mode is the direction of the arrows.  The arrow points inward on a N channel and outward on a P channel.  This is the exact opposite of the direction on a JFET.   I do not know of any memory devices to help you out,  I have heard a story on why this is the case, but I cannot remember it.   As much as I hate to say it, it just is the way it is.  When I do find the reason I will post it in a future blog post.  A final thing to point out, I do not think circuit designers are real religious about always showing the breaks in the enhancement mode MOSFETs.  As we shall see later, it is not always that important.

Conceptual diagram of an N-channel enhancement mode MOSFET

Conceptual diagram of an N-channel enhancement mode MOSFET

The enhancement mode MOSFET is constructed very similar to the depletion mode MOSFET except there is no channel created in the substrate.  Once the gate has a positive voltage applied to it, the holes of the substrate material is repelled from that area and the substrate near the gate effectively becomes an N type material.  This means that for low values of Vgs the channel will be effectively pinched off.   However once above that value the IGFET will act exactly like the other FET’s   For low voltages of Vds the FET will act as a resistor controlled by the gate voltage.   Once Vdx is increased a depletion zone will form around the drain end and start pinching off the channel.

The curves look exactly the same as the JFET curves except zero current will flow until Vgs is greater than some positive voltage.   I will find some typical data sheets and produce a couple of videos showing all of this with real data.

Now we come to a really interesting thing.   A depletion mode n-channel MOSFET can be operated in the enhancement area.  This means we can operate a depletion mode n-channel MOSFET with negative gate voltages and positive gate voltages.    This is because once we increase the gate voltage above zero the channel is increased above that already created in the device by doping the channel.

MOSFET’s are really the workhorses of the digital revolution.   For example, since the gate is simply a plate of a capacitor, if it was possible to place a charge on it, we could have a way of remembering if the circuit was off or on until the capacitor discharges.   This is exactly what happens in a type of memory called DRAM.

Because the gate current is so low MOSFETS are very handy devices for digital and input stages of high impedance input amplifiers.

Soon I will produce some videos talking about real BJT’s, JFETs, and MOSFETs.    We will also look at the datasheet of the MOSFET used in the desulfator circuit and that is an interesting one.


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