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Field Effect Transistor Theory – Part 2

JFET symbols

JFET symbols

In Part 1 we introduced a conceptual diagram of the construction of a JFET and talked about what happens if the gate voltages is changed in comparison to the source while the drain to source voltage is kept at a low value. Today we are going to start out talking about what happens if the gate voltage is kept at the same voltage as the source. Later we will create a graph to show both the gate and the drain voltage changing.

Depletion Zone with Vds = 2 and Vgs = 0.

Depletion Zone with Vds = 2 and Vgs = 0.

On an N channel JFET the drain will be kept at a positive voltage compared to the source so electron current will flow from the drain to the source. In the diagram our imaginary JFET has the drain at +2 volt compared to both the gate and the source. Because the drain end of the gate sees a greater potential difference the depletion zone will increase at that end and the channel will be pinched at that end. However, the channel will remain wide open at the source end. This means that current flow will be decreased, but not as much as it would be if the complete channel was squeezed.

Note that on the N-channel JFET the gate is reversed biased to the drain.  It must remain that way to keep destructive currents from flowing from the gate to the drain.   A P-channel JFET would work exactly the same way except we would be talking about hole currents flowing from the source to the drain and the drain would be biased with a negative voltage.  Again, the gate to drain would be reversed biased.

Depletion zone with Vds = 4 V and vgs = 0 V

Depletion zone with Vds = 4 V and vgs = 0 V

Now imagine that we have increase the Vds (and the Vdg) Voltage to 4 V.  The drain end of the channel will be pinched off because our pinch-off voltage was found to be 4 V when we adjusted the gate voltage with a low Vds.   However, it is only pinched off near the drain and most of the channel is still wide open.

Depletion Zone with Vds = 10 and Vgs = 0

Depletion Zone with Vds =
10 and Vgs = 0

We again increase the Vds, this time to 10 Volts and arrive with a depletion zone looking similar to the final picture. Now on our conceptual diagram a much greater length of the channel is pinched off, but much of the channel is still open.




A Plot of Ids with both Vg and Vds changing.

A Plot of Ids with both Vg and Vds changing.

On the final diagram I show a somewhat idealized graph of what happens when Vds is changed with five different values of Vg.  There is three distinct portions of this plot.  For each value of Vg there is a diagonal line starting from Vds & Id both at 0, to some point where the line starts to become a curve.  This part of the line is called the ohmic portion of the curve and follows Ohms law. where Id = Vds/R and R is set by Vg.   In other words, Vg changes the slope of these lines.

On the opposite end of each curve there this a horizontal line of constant current, no matter what the Vds value is.   (Note:  This graph is idealized,  these lines do have a slight upward curve, but we are not going to let reality get in the way of a good story… For now.   That is a bridge we will cross later.)   This portion of the curve is actually the normal operation range of FET’s.   Now is a good time to point out a problem here.   Notice the lines are not evenly spaced.   A one volt change from Vg = 2 to 3 volts does not cause the same change in current as a one volt change from Vg = 0 to 1 volt.   Say “UH OH”. Things will get complicated if we intend to use this as a simple amplified.   (We will get there… eventually.)  I personally have a little bit of a problem understanding why this curve flattens out like this.  The best analogy I can think of is that we have a very small channel and no matter how much voltage we apply across it, we are only able to get a given amount of current.   Mostly, I am just stuck with, “that is the way it works and it just is the way it is.”

Between the two straight line portions of the graph is the elbow, dog leg, hockey stick, whatever term you like to describe the bow.   That transition portion of the graph is just something we will note, but it is not an area where we want to operate the device.

Where ate we headed?  Very soon I will talk about another type of FET called the IGFET and the one most often used called a MOSFET.  Then we will be able to completely analyze the Desulfator circuit.   After that, we will talk about simple circuit modeling.   Next we will draw simple diagrams of models for Bipolar Junction Transistor (BJT) models and FET models.  These diagrams will allow us to get close to predicting the operation and we will design some simple circuits.   Then we will move on to actual computer models of the circuits.   Normally you will want to do simple models and the pencil and paper model before jumping directly into the computer models so you have a very good understanding and get the circuit close before adding the extra complications.

FET’s are used extensively in digital circuits because of the high impedance and low current flows into the input.   However, because of the non-linear change with respect to the gate voltage, they are normally only used for the input stage for amplifiers if at all in analog circuits.   When they are used in the analog circuit the gain is kept very low to minimize the non-linear problems and the current output is then used to drive BJT circuits.   It has not been that many years ago a new device was developed for power electronics called the IGBJT, (Insulated Gate Bipolar Junction Transistor).  This combines both the FET and BJT properties in one device.  It is only used for switching devices such as variable frequency drives, but is available for very high amperage.   We will be getting there eventually, although it is used in industrial circuits and is not used in things that we may be operating in our hobby uses.

It is my sincere hope that you have found this interesting and will continue to stick around while I slowly make it through the theory.


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